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EFI Cache Subclass Specification v0.9

Defines core code for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI CPU I/O Protocol Specification v0.9

Covers core code and services required for an implementation of the CPU I/O Protocol of the Intel® Platform Innovation Framework for EFI.

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Intel® 7500 Scalable Memory Buffer Datasheet

Datasheet: Intel® 7500 Scalable Memory Buffer Datasheet.

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Intel® Itanium® Processor 9500 Series

Learn about the Intel® Itanium® processor 9500 series: a powerful platform for virtualization and consolidation of today’s most demanding workloads.

EFI Human Interface Infrastructure Specification v0.91

Defines core code for implementation of Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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EFI System Management Mode Core Interface Spec (SMM CIS) v0.9

Defines the core code and services required for implementation of the System Management Mode of the Intel® Platform Innovation Framework for EFI.

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EFI Pre-EFI Initialization Core Interface Specification v0.9

Defines the required core code and services for the Pre-EFI Initialization (PEI) phase of the Intel® Platform Innovation Framework for EFI.

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Intel® Itanium® Processor 9000 and 9100 Series Datasheet

Intel® Itanium® processor 9000 and 9100 series.

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Intel® Itanium® Processor 9300/9500 Series: Datasheet

Electrical, thermal, and mechanical specs, pin listing, system management bus, signal definitions for the Intel® Itanium® processor 9300/9500 series.

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Intel® Itanium® Processor 9300/9500 Series: Spec Update

Spec Update: Device errata, spec clarifications, and changes to the Intel® Itanium® Processor 9300/9500 series documentation.

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