The Intel® Developer Network for PCI Express* Architecture is a developer community offering access to resources and peers.
The Intel developer network for PCI Express* architecture is a developer community offering access to resources and peers working on PCI Express* designs.
Technical details to understand USB 3.0 and 2.0 spec requirements, design compatible products, download developer-related PDFs, and more.
Technical details necessary to understand USB 3.0 and 2.0 spec requirements and design compatible products, including links to download developer-related PDFs, USB EHCI Compliance Testing Program info, adopters’ agreement, and more.
The EHCI compliance testing evaluates the EHCI controller function of a USB 2.0 Host controller.
USB EHCI compliance test program information for evaluating USB 2.0 host controller conformance and function, including suggested components, download link, related Intel-specific information, and more.
Specification: Describes the enhanced host controller interface for USB 2.0, including the system software/host controller hardware interface.
Specification: The enhanced host controller interface specification describes the register-level interface for a host controller for the universal serial bus revision 2.0, including the interface between system software and host controller hardware.
PCI Express* Architecture is a standards-based serial data, multi-lane interconnect for high-performance, scalable interconnects.
PCI Express* Architecture is a standards-based serial data, multi-lane interconnect for high-performance, scalable interconnects in PC and embedded devices.