"Pin Information for the Intel® MAX®10 10M16SL Device Version 2021.11.01 Note (1)" Bank Number VREF Pin Name/Function Optional Function(s) Configuration Function Dedicated Tx/Rx Channel Emulated LVDS Output Channel IO Performance Y180 1A VREFB1N0 IO DIFFIO_RX_L1n DIFFOUT_L1n Low_Speed C3 1A VREFB1N0 IO DIFFIO_RX_L1p DIFFOUT_L1p Low_Speed C2 1A VREFB1N0 IO DIFFIO_RX_L3n DIFFOUT_L3n Low_Speed B2 1A VREFB1N0 IO DIFFIO_RX_L3p DIFFOUT_L3p Low_Speed C1 1A VREFB1N0 IO DIFFIO_RX_L5n DIFFOUT_L5n Low_Speed E4 1A VREFB1N0 IO DIFFIO_RX_L5p DIFFOUT_L5p Low_Speed E3 1A VREFB1N0 IO DIFFIO_RX_L7n DIFFOUT_L7n Low_Speed D1 1A VREFB1N0 IO DIFFIO_RX_L7p DIFFOUT_L7p Low_Speed D2 1B VREFB1N0 IO JTAGEN E1 1B VREFB1N0 IO TMS DIFFIO_RX_L11n DIFFOUT_L11n Low_Speed F5 1B VREFB1N0 IO VREFB1N0 Low_Speed E5 1B VREFB1N0 IO TCK DIFFIO_RX_L11p DIFFOUT_L11p Low_Speed F4 1B VREFB1N0 IO TDI DIFFIO_RX_L12n DIFFOUT_L12n Low_Speed F2 1B VREFB1N0 IO TDO DIFFIO_RX_L12p DIFFOUT_L12p Low_Speed F3 1B VREFB1N0 IO DIFFIO_RX_L14n DIFFOUT_L14n Low_Speed G2 1B VREFB1N0 IO DIFFIO_RX_L14p DIFFOUT_L14p Low_Speed G1 1B VREFB1N0 IO DIFFIO_RX_L16n DIFFOUT_L16n Low_Speed G5 1B VREFB1N0 IO DIFFIO_RX_L16p DIFFOUT_L16p Low_Speed G4 2 VREFB2N0 IO CLK0n DIFFIO_RX_L20n DIFFOUT_L20n High_Speed F7 2 VREFB2N0 IO H4 2 VREFB2N0 IO CLK0p DIFFIO_RX_L20p DIFFOUT_L20p High_Speed G6 2 VREFB2N0 IO CLK1n DIFFIO_RX_L22n DIFFOUT_L22n High_Speed H1 2 VREFB2N0 IO CLK1p DIFFIO_RX_L22p DIFFOUT_L22p High_Speed H2 2 VREFB2N0 IO DPCLK0 DIFFIO_RX_L24n DIFFOUT_L24n High_Speed J2 2 VREFB2N0 IO VREFB2N0 High_Speed H6 2 VREFB2N0 IO DPCLK1 DIFFIO_RX_L24p DIFFOUT_L24p High_Speed J1 2 VREFB2N0 IO High_Speed H5 2 VREFB2N0 IO DIFFIO_RX_L25n DIFFOUT_L25n High_Speed K2 2 VREFB2N0 IO DIFFIO_RX_L25p DIFFOUT_L25p High_Speed K1 2 VREFB2N0 IO PLL_L_CLKOUTn DIFFIO_RX_L31n DIFFOUT_L31n High_Speed K3 2 VREFB2N0 IO PLL_L_CLKOUTp DIFFIO_RX_L31p DIFFOUT_L31p High_Speed L3 3 VREFB3N0 IO DIFFIO_TX_RX_B1n DIFFOUT_B1n High_Speed M3 3 VREFB3N0 IO DIFFIO_TX_RX_B1p DIFFOUT_B1p High_Speed L4 3 VREFB3N0 IO DIFFIO_TX_RX_B3n DIFFOUT_B3n High_Speed K4 3 VREFB3N0 IO DIFFIO_TX_RX_B3p DIFFOUT_B3p High_Speed J5 3 VREFB3N0 IO DIFFIO_TX_RX_B5n DIFFOUT_B5n High_Speed L5 3 VREFB3N0 IO DIFFIO_TX_RX_B5p DIFFOUT_B5p High_Speed M5 3 VREFB3N0 IO DIFFIO_TX_RX_B13n DIFFOUT_B13n High_Speed K6 3 VREFB3N0 IO DIFFIO_TX_RX_B13p DIFFOUT_B13p High_Speed J6 3 VREFB3N0 IO VREFB3N0 High_Speed K5 3 VREFB3N0 IO High_Speed L6 3 VREFB3N0 IO CLK6n DIFFIO_TX_RX_B18n DIFFOUT_B18n High_Speed K7 3 VREFB3N0 IO CLK6p DIFFIO_TX_RX_B18p DIFFOUT_B18p High_Speed L7 3 VREFB3N0 IO CLK7n DIFFIO_TX_RX_B20n DIFFOUT_B20n High_Speed J7 3 VREFB3N0 IO CLK7p DIFFIO_TX_RX_B20p DIFFOUT_B20p High_Speed H8 3 VREFB3N0 IO DIFFIO_TX_RX_B22n DIFFOUT_B22n High_Speed L8 3 VREFB3N0 IO DIFFIO_TX_RX_B22p DIFFOUT_B22p High_Speed K8 4 VREFB4N0 IO DIFFIO_TX_RX_B24n DIFFOUT_B24n High_Speed J9 4 VREFB4N0 IO DIFFIO_RX_B25n DIFFOUT_B25n High_Speed M9 4 VREFB4N0 IO DIFFIO_TX_RX_B24p DIFFOUT_B24p High_Speed K9 4 VREFB4N0 IO DIFFIO_RX_B25p DIFFOUT_B25p High_Speed L9 4 VREFB4N0 IO DIFFIO_TX_RX_B26n DIFFOUT_B26n High_Speed K10 4 VREFB4N0 IO DIFFIO_RX_B27n DIFFOUT_B27n High_Speed M10 4 VREFB4N0 IO DIFFIO_TX_RX_B26p DIFFOUT_B26p High_Speed J10 4 VREFB4N0 IO DIFFIO_RX_B27p DIFFOUT_B27p High_Speed L10 4 VREFB4N0 IO VREFB4N0 High_Speed H10 4 VREFB4N0 IO DIFFIO_RX_B38n DIFFOUT_B38n High_Speed L11 4 VREFB4N0 IO DIFFIO_RX_B38p DIFFOUT_B38p High_Speed K11 4 VREFB4N0 IO DIFFIO_TX_RX_B41n DIFFOUT_B41n High_Speed M12 4 VREFB4N0 IO DIFFIO_TX_RX_B41p DIFFOUT_B41p High_Speed L12 5 VREFB5N0 IO RUP DIFFIO_RX_R1p DIFFOUT_R1p High_Speed K15 5 VREFB5N0 IO DIFFIO_RX_R2p DIFFOUT_R2p High_Speed L14 5 VREFB5N0 IO RDN DIFFIO_RX_R1n DIFFOUT_R1n High_Speed K14 5 VREFB5N0 IO DIFFIO_RX_R2n DIFFOUT_R2n High_Speed K13 5 VREFB5N0 IO DIFFIO_RX_R11p DIFFOUT_R11p High_Speed J15 5 VREFB5N0 IO High_Speed J13 5 VREFB5N0 IO DIFFIO_RX_R11n DIFFOUT_R11n High_Speed J14 5 VREFB5N0 IO VREFB5N0 High_Speed G9 5 VREFB5N0 IO DIFFIO_RX_R12p DIFFOUT_R12p High_Speed J11 5 VREFB5N0 IO DIFFIO_RX_R12n DIFFOUT_R12n High_Speed J12 5 VREFB5N0 IO DIFFIO_RX_R14p DIFFOUT_R14p High_Speed H12 5 VREFB5N0 IO DIFFIO_RX_R15p DIFFOUT_R15p High_Speed H14 5 VREFB5N0 IO DIFFIO_RX_R14n DIFFOUT_R14n High_Speed H11 5 VREFB5N0 IO DIFFIO_RX_R15n DIFFOUT_R15n High_Speed H13 6 VREFB6N0 IO CLK2p DIFFIO_RX_R18p DIFFOUT_R18p High_Speed G15 6 VREFB6N0 IO CLK2n DIFFIO_RX_R18n DIFFOUT_R18n High_Speed G14 6 VREFB6N0 IO CLK3p DIFFIO_RX_R20p DIFFOUT_R20p High_Speed G13 6 VREFB6N0 IO CLK3n DIFFIO_RX_R20n DIFFOUT_R20n High_Speed F14 6 VREFB6N0 IO DIFFIO_RX_R22p DIFFOUT_R22p High_Speed G12 6 VREFB6N0 IO DIFFIO_RX_R22n DIFFOUT_R22n High_Speed G11 6 VREFB6N0 IO DPCLK3 DIFFIO_RX_R30p DIFFOUT_R30p High_Speed E14 6 VREFB6N0 IO VREFB6N0 High_Speed F12 6 VREFB6N0 IO DPCLK2 DIFFIO_RX_R30n DIFFOUT_R30n High_Speed F13 6 VREFB6N0 IO High_Speed E12 6 VREFB6N0 IO DIFFIO_RX_R31p DIFFOUT_R31p High_Speed E13 6 VREFB6N0 IO DIFFIO_RX_R32p DIFFOUT_R32p High_Speed D15 6 VREFB6N0 IO DIFFIO_RX_R31n DIFFOUT_R31n High_Speed D13 6 VREFB6N0 IO DIFFIO_RX_R32n DIFFOUT_R32n High_Speed D14 6 VREFB6N0 IO DIFFIO_RX_R37p DIFFOUT_R37p High_Speed C14 6 VREFB6N0 IO DIFFIO_RX_R37n DIFFOUT_R37n High_Speed C13 7 VREFB7N0 IO DIFFIO_RX_T1p DIFFOUT_T1p High_Speed D12 7 VREFB7N0 IO DIFFIO_RX_T2p DIFFOUT_T2p High_Speed A13 7 VREFB7N0 IO DIFFIO_RX_T1n DIFFOUT_T1n High_Speed E11 7 VREFB7N0 IO DIFFIO_RX_T2n DIFFOUT_T2n High_Speed B13 7 VREFB7N0 IO DIFFIO_RX_T3p DIFFOUT_T3p High_Speed B12 7 VREFB7N0 IO DIFFIO_RX_T3n DIFFOUT_T3n High_Speed A12 7 VREFB7N0 IO DIFFIO_RX_T6p DIFFOUT_T6p High_Speed D11 7 VREFB7N0 IO DIFFIO_RX_T6n DIFFOUT_T6n High_Speed C11 7 VREFB7N0 IO DIFFIO_RX_T8p DIFFOUT_T8p High_Speed E10 7 VREFB7N0 IO DIFFIO_RX_T8n DIFFOUT_T8n High_Speed D10 7 VREFB7N0 IO VREFB7N0 High_Speed C10 7 VREFB7N0 IO DIFFIO_RX_T16p DIFFOUT_T16p High_Speed E9 7 VREFB7N0 IO DIFFIO_RX_T17p DIFFOUT_T17p High_Speed A10 7 VREFB7N0 IO DIFFIO_RX_T16n DIFFOUT_T16n High_Speed D9 7 VREFB7N0 IO DIFFIO_RX_T17n DIFFOUT_T17n High_Speed B10 7 VREFB7N0 IO DIFFIO_RX_T21p DIFFOUT_T21p High_Speed C9 7 VREFB7N0 IO DIFFIO_RX_T21n DIFFOUT_T21n High_Speed B9 8 VREFB8N0 IO CLK5p DIFFIO_RX_T26p DIFFOUT_T26p Low_Speed D8 8 VREFB8N0 IO CLK5n DIFFIO_RX_T26n DIFFOUT_T26n Low_Speed C8 8 VREFB8N0 IO DIFFIO_RX_T28p DIFFOUT_T28p Low_Speed E7 8 VREFB8N0 IO DEV_CLRn DIFFIO_RX_T28n DIFFOUT_T28n Low_Speed E6 8 VREFB8N0 IO DEV_OE B8 8 VREFB8N0 IO VREFB8N0 Low_Speed B7 8 VREFB8N0 IO CONFIG_SEL Low_Speed A7 8 VREFB8N0 IO D6 8 VREFB8N0 Input_only nCONFIG Low_Speed C7 8 VREFB8N0 IO DIFFIO_RX_T32p DIFFOUT_T32p Low_Speed B6 8 VREFB8N0 IO DIFFIO_RX_T32n DIFFOUT_T32n Low_Speed C6 8 VREFB8N0 IO DIFFIO_RX_T34p DIFFOUT_T34p Low_Speed A5 8 VREFB8N0 IO CRC_ERROR DIFFIO_RX_T34n DIFFOUT_T34n Low_Speed B5 8 VREFB8N0 IO C5 8 VREFB8N0 IO nSTATUS DIFFIO_RX_T36p DIFFOUT_T36p Low_Speed B4 8 VREFB8N0 IO CONF_DONE DIFFIO_RX_T36n DIFFOUT_T36n Low_Speed A4 8 VREFB8N0 IO DIFFIO_RX_T38p DIFFOUT_T38p Low_Speed D5 8 VREFB8N0 IO DIFFIO_RX_T38n DIFFOUT_T38n Low_Speed C4 GND M7 GND M6 GND M4 GND M15 GND M11 GND M1 GND L13 GND J8 GND J4 GND H3 GND H15 GND G7 GND F10 GND F1 GND E2 GND E15 GND D7 GND D3 GND C15 GND C12 GND B3 GND A8 GND A6 GND A15 GND A11 GND A1 VCCIO1A D4 VCCIO1B F6 VCCIO2 J3 VCCIO3 H7 VCCIO3 G8 VCCIO4 H9 VCCIO5 K12 VCCIO6 G10 VCCIO6 F11 VCCIO7 F9 VCCIO7 B11 VCCIO8 F8 VCCIO8 E8 VCCA1 L2 VCCA2 B15 VCCA3 A3 VCCA4 M13 VCC_ONE M8 VCC_ONE M2 VCC_ONE M14 VCC_ONE L15 VCC_ONE L1 VCC_ONE G3 VCC_ONE F15 VCC_ONE B14 VCC_ONE B1 VCC_ONE A9 VCC_ONE A2 VCC_ONE A14 Note: "(1) For more information about pin definition and pin connection guidelines, refer to the" Intel MAX 10 FPGA Device Family Pin Connection Guidelines.