C-Based FPGA Design Flows

Model-based Design Flows

Intel® FPGAs and SoC FPGAs are supported by three unique design flows to improve FPGA design productivity. Whether you are a traditional HDL designer, model-based designer or C-based programmer, Intel® FPGA is actively involved with world-class industry partners to ensure system designers can benefit from tools that provide this next level of abstraction.

DSP Design Flows for Intel® FPGAs and SoC FPGAs


MathWorks Simulink

C-Based Design

Traditional Verilog and VHDL design flows using Quartus® II Software and DSP Builder

Model-based design flow for DSP designers with MathWorks tools

MathWorks HDL Coder and Embedded Coder offer support for Intel® FPGA SoC family. Developers familiar with MathWorks tools can stay in their MathWorks development environment for code generation targeting Intel® FPGA SoCs. This allows FPGA designers and processor programmers to share a common design methodology streamlined for Intel® FPGA SoCs."

OpenCL offers a true push-button comile experience for software programmers

Quartus II

Design Software

DSP Builder + Quartus II

Design Software

Partner C-Synthesis Tools +

Quartus II Design software