Smaller, modern code base, use of COTS OS
ARM is bi-endian, but designs commonly run little-endian, so will not likely rely on Intel Bi-Endian C++ Compiler (BEC)
Vector oriented instructions: ARM uses NEON. Intel architecture uses SSE2 instructions. Recode/translate for SSE
Serial code is common
Virtualization is a common solution
Instruction alignment required (not required on older ARM(4) or Intel architecture)
Function used to catch the HW trap and throw exception on ARM. Operation is fatal on Intel architecture
Arguments are passed in registers and stack (passed on stack for Intel architecture, passed on stack and registers for Intel® 64)
C-function’s calling conversion: ARM uses right most argument evaluation first, Intel architecture uses left most argument first
Programming languages:

JAVA language: 

There is normally no concern for JAVA applications, but need to re-compile for Intel architecture in the case of NDK based JAVA applications. 

C/C++:  

Recompile for Intel architecture. If in-line assembly code exists, recode for Intel architecture assembly code. Such as NEON to SSE. 
ARM IP’s provide the specific product capabilities. Intel architecture cores and chipsets provide capabilities