JESD204C Intel® FPGA IP
The JESD204C Intel® FPGA IP is a high-speed point-to-point serial interface for digital-to-analog (DAC) or analog-to-digital (ADC) converters to transfer data to FPGA devices.
Read the JESD204C Intel® FPGA IP user guide ›
Read the JESD204C Intel Agilex® 7 F-Tile FPGA IP user guide ›
Read the JESD204C Intel Agilex® 7 FPGA IP design example user guide ›
Read the JESD204C Intel® Stratix® 10 FPGA IP design example user guide ›
JESD204C Intel® FPGA IP
The JESD204C Intel® FPGA IP incorporates:
- Media access control (MAC)—data link layer (DLL) and transport layer (TL) blocks that control the link states.
- Physical layer (PHY)—physical coding sublayer (PCS) and physical media attachment (PMA) block.
Features
The JESD204C Intel® FPGA IP core delivers the following key features:
- Data rate of up to 32.44032 Gbps for Intel Agilex® 7 F-tile devices and 28.9 Gbps for Intel Agilex® 7 E-tile devices and Intel® Stratix® 10 E-tile devices.
- Single or multiple lanes (up to 16 lanes per link)
- Local extended multiblock clock (LEMC) counter based on E=1 to 256
- Serial lane alignment and monitoring
- Lane synchronization
- Modular design that supports multidevice synchronization
- MAC and PHY partitioning
- Deterministic latency support
- 64/66 encoding
- Scrambling/descrambling
- Avalon® streaming interface for transmit and receive datapaths
- Avalon® memory-mapped interface for control/status registers (CSR)
- Dynamic generation of simulation test bench
- Bonded and non-bonded TX PMA mode
- Optional support for ECC M20K DCFIFO
- Options for sync header configurations
- CRC-12
- Stand-alone command channels
Related Links
Additional Resources
Find IP
Find the right Intel® FPGA Intellectual Property core for your needs.
Technical Support
For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.
IP Evaluation and Purchase
Evaluation mode and purchasing information for Intel® FPGA Intellectual Property cores.
Designing with Intel® FPGA IP
Learn more about designing with Intel® FPGA IP, a large selection of off-the-shelf cores optimized for Intel® FPGAs.
IP Base Suite
Free Intel® FPGA IP Core licenses with an active license for Intel® Quartus® Prime Standard or Pro Edition Software.
Design Examples
Download design examples and reference designs for Intel® FPGA devices.
Contact Sales
Get in touch with sales for your Intel® FPGA product design and acceleration needs.