Product Collection
Marketing Status
Launched
Launch Date
2013
Lithography
20 nm

Resources

Logic Elements (LE)
220000
Adaptive Logic Modules (ALM)
83730
Adaptive Logic Module (ALM) Registers
334920
Fabric and I/O Phase-Locked Loops (PLLs)
12
Maximum Embedded Memory
12.8 Mb
Digital Signal Processing (DSP) Blocks
192
Digital Signal Processing (DSP) Format
Multiply, Multiply and Accumulate, Variable Precision, Fixed Point (hard IP), Floating Point (hard IP)
Hard Processor System (HPS)
Dual-core Arm* Cortex*-A9
Hard Memory Controllers
Yes
External Memory Interfaces (EMIF)
DDR4, DDR3, QDR II, QDR II+, QDR IV, LPDDR3, DDR3L

I/O Specifications

Maximum User I/O Count
288
I/O Standards Support
3.0 V LVTTL, 1.2 V to 3.0 V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL
Maximum LVDS Pairs
120
Maximum Non-Return to Zero (NRZ) Transceivers
12
Maximum Non-Return to Zero (NRZ) Data Rate
17.4 Gbps
Transceiver Protocol Hard IP
PCIe Gen3

Advanced Technologies

FPGA Bitstream Security
Yes

Package Specifications

Package Options
U484, F672, F780

Supplemental Information