Status
Launched
Launch Date
Q2'19
Lithography
10 nm

Resources

Logic Elements (LE)
2208075
Adaptive Logic Modules (ALM)
748500
Adaptive Logic Module (ALM) Registers
2994000
Fabric and I/O Phase-Locked Loops (PLLs)
28
Maximum Embedded Memory
235 Mb
Digital Signal Processing (DSP) Blocks
6250
Digital Signal Processing (DSP) Format
Fixed Point (hard IP), Floating Point (hard IP), Multiply, Multiply and Accumulate, Variable Precision
Hard Processor System (HPS)
Quad-core 64 bit Arm* Cortex*-A53
Hard Crypto Blocks
0
Hard Memory Controllers
Yes
External Memory Interfaces (EMIF)
DDR4, QDR IV

I/O Specifications

Maximum User I/O Count
720
I/O Standards Support
1.2 V LVCMOS, 1.8 V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, True Differential Signaling
Maximum LVDS Pairs
360
Maximum Non-Return to Zero (NRZ) Transceivers
64
Maximum Non-Return to Zero (NRZ) Data Rate
32 Gbps
Maximum Pulse-Amplitude Modulation (PAM4) Transceivers
48
Maximum Pulse-Amplitude Modulation (PAM4) Data Rate
58 Gbps
Transceiver Protocol Hard IP
PCIe Gen4, 10/25/50/100/200/400G Ethernet

Advanced Technologies

Hyper-Registers
Yes
FPGA Bitstream Security
Yes

Package Specifications

Package Options
R3184C

Supplemental Information

Additional Information