Port 80h POST Codes for Intel® Desktop Boards
This document defines the beep codes, error messages, and Power-On Self Test (POST) codes associated with BIOS versions based on Extensible Framework Interface (EFI).
Contents:
Beep codes
BIOS error messages
Port 80h POST codes
Displaying POST codes
POST code ranges
POST codes
Typical POST sequence
The onboard speaker emits audible error codes (beep codes) during POST. Not all Intel® Desktop Boards include an onboard speaker.
Type | Pattern | Frequency |
Memory error | Three long beeps | 1,280 Hz |
Thermal warning | Four alternating beeps: High tone, low tone, high tone, low tone | High tone: 2,000 Hz Low tone: 1,600 Hz |
Error Message | Explanation |
A processor that wasn't meant to be used with this board was detected. Using an unsupported processor can result in improper operation, damage to the desktop board or processor, or reduced product life. System shuts down in 10 seconds. | The installed processor isn't compatible with the desktop board. |
CMOS Battery Low | The battery could be losing power. Replace the battery soon. |
CMOS Checksum Bad | The CMOS checksum is incorrect. CMOS memory could be corrupted. Run Setup to reset values. |
Memory Size Decreased | Memory size has decreased since the last boot. If no memory was removed, the memory might be bad. |
No Boot Device Available | System didn't find a device to boot. |
During the Power-On Self Test (POST), the BIOS sends progress codes (POST codes) to I/O port 80h. If the POST fails, the last POST code generated is left at port 80h. Use this code to find out why the error occurred.
You can display POST codes using either of the following methods.
POST card (PCI add-in card) | The POST card decodes the port and displays the contents on an LED display. The POST card must be installed in PCI bus connector 1. | ![]() |
Onboard POST code LED display | Some Intel® Desktop Boards include an onboard LED to show POST codes | ![]() |
In the tables below, all POST codes and range values are listed in hexadecimal.
Range | Category/Subsystem |
00 – 0F | Debug codes: Can be used by any PEIM/driver for debug |
10 – 1F | Host Processors |
20 – 2F | Memory/Chipset |
30 – 3F | Recovery |
40 – 4F | Reserved for future use |
50 – 5F | I/O Busses: PCI, USB, ISA, ATA, and so forth |
60 – 6F | Not currently used |
70 – 7F | Output Devices: All output consoles |
80 – 8F | Reserved for future use (new output console codes) |
90 – 9F | Input devices: Keyboard/Mouse |
A0 – AF | Reserved for future use (new input console codes) |
B0 – BF | Boot Devices: Includes fixed media and removable media. |
C0 – CF | Reserved for future use |
D0 – DF | Boot device selection |
E0 – FF | E0 - EE: Miscellaneous codes F0 – FF: FF processor exception |
Typical port 80h POST sequence
Port 80h code values typically increase during the boot process. The early codes are for subsystems closer to the processor and the later codes are for peripherals. Generally, the order of initialization is Processor -> Memory -> Busses -> Output/Input Devices -> Boot Devices. The sequence of POST is system-specific.
POST code | Description |
21 | Initializing a chipset component |
22 | Reading SPD from memory DIMMs |
23 | Detecting presence of memory DIMMs |
25 | Configuring memory |
28 | Testing memory |
34 | Loading recovery capsule |
E4 | Entered DXE phase |
12 | Starting Application processor initialization |
13 | SMM initialization |
50 | Enumerating PCI busses |
51 | Allocating resourced to PCI bus |
92 | Detecting the presence of the keyboard |
90 | Resetting keyboard |
94 | Clearing keyboard input buffer |
95 | Keyboard Self Test |
EB | Calling Video BIOS |
58 | Resetting USB bus |
5A | Resetting PATA/SATA bus and all devices |
92 | Detecting the presence of the keyboard |
90 | Resetting keyboard |
94 | Clearing keyboard input buffer |
5A | Resetting PATA/SATA bus and all devices |
28 | Testing memory |
90 | Resetting keyboard |
94 | Clearing keyboard input buffer |
E7 | Waiting for user input |
01 | INT 19 |
00 | Ready to boot |