Article ID: 000074161 Content Type: Troubleshooting Last Reviewed: 12/07/2012

Nios II Processor Generates Incorrect Results from Shift Right (SRAI, SRA) Instructions

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Shift right operations by the Nios II processor on Arria V and Stratix V devices might produce incorrect results in certain configurations. This issue can occur when the hardware multiplication type is set to DSP Block. When the Nios II processor executes the SRAI or SRA instruction on a negative value, the result is shifted, but not sign-extended.

    This issue is a result of how the DSP block wrapper is implemented for 28nm devices.

    Resolution

    You can fix this issue in the Quartus II software v12.0 by applying a patch. To obtain the patch, file a service request at mySupport, referring to solution ID number rd07032012_629.

    Related Products

    This article applies to 2 products

    Arria® V FPGAs and SoC FPGAs
    Stratix® V FPGAs