Article ID: 000075027 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Can a dedicated clock pin to the PLL feed both the PLL and the global clock network in Cyclone II devices?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Yes, in Cyclone® II devices you can feed the PLL and the global clock network from the same dedicated clock input pin.

This will not compromise the compensation path of the dedicated clock routing to the PLL.

Related Products

This article applies to 1 products

Cyclone® II FPGA