Article ID: 000078906 Content Type: Troubleshooting Last Reviewed: 02/24/2014

Errata - Known Stratix V timing model issues in Quartus II software version 12.1 SP1

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Timing models for Stratix® V devices have been updated in the Quartus® II software version 13.0 to address issues in version 12.1 SP1. These changes affect all Stratix V devices, including devices that had been designated with "Final" timing status in previous versions of the Quartus II software.

    For information on timing model changes in other versions of the Quartus II software, refer to the Related Solutions section below.

    M20K clr input is not timing-analyzed in some circumstances

    The clr input of M20K memories, when driven directly by a global, regional or periphery clock buffer, is not analyzed by the TimeQuest timing analyzer in the Quartus II software version 12.1 SP1 and earlier.

    Logic and routing delays have minor errors

    A software error in the Quartus II software version 12.1 SP1 and earlier caused minor timing modeling errors for some logic and routing delays (typically <20 ps).

    Resolution

    Timing models have been updated in Quartus II software version 13.0 and in Quartus II software version 12.1 SP1 patch 1.dp7. If you currently use Quartus II software version 12.1 SP1, you may use version patch 1.dp7 to continue your work without needing to re-generate your IP. Patch 1.dp7 can be downloaded from the related solution below. Quartus II software version 13.0 has features in addition to the timing model changes in version 12.1 SP1 patch 1.dp7.

    If your design uses M20K memory with clr input driven by a clock buffer, or if you are debugging an issue that could be timing-related even though the TimeQuest timing analyzer reports no timing errors, re-run timing analysis in either Quartus II software version 13.0 or version 12.1 SP1 with patch 1.dp7 as follows:

    • Back up the design database.
    • Open the design in the earlier Quartus II software version, and then export the database. On the Project menu, click Export Database. When you are prompted, export the database to the suggested export_db directory.
    • Start the Quartus II software version 13.0 or version 12.1 SP1 with patch 1.dp7.
    • Open the project. When you are prompted whether to overwrite the older database version, click Yes, and import the database from the export_db directory.
    • Run the TimeQuest timing analyzer on the design.

    If there are timing violations, run the Fitter in the Quartus II software version 13.0 or version 12.1 SP1 with patch 1.dp7 to close timing on the design.