Article ID: 000080863 Content Type: Troubleshooting Last Reviewed: 08/18/2023

Why does my 4-channel variant with PTP enabled in the  E-Tile Hard IP for Ethernet Intel® Stratix® 10 FPGA IP show as 6 channels when I open it in the Transceiver Toolkit?

Environment

  • Intel® Quartus® Prime Pro Edition
  • E-tile Hard IP for Ethernet Intel® FPGA IP
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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 19.1 and earlier, the number of channels that are shown in the Transceiver Toolkit for multi-channel variants of E-Tile Hard IP for Ethernet Intel® Stratix® 10 FPGA IP with PTP enabled is incorrect.

    Resolution

    In variants with PTP enabled certain transceiver channels are reserved to support the PTP functionality. The channels reserved for PTP depend on the design’s physical placement.  

    These reserved channels should be ignored in Transceiver Toolkit. The PTP reserved channels in E-Tile are channels 4 and 5 for transceiver channels 0-3, channels 6 and 7 for transceiver channels 8-11, channels 16 and 17 for transceiver channels 12-15, and channels 18 and 19 for transceiver channels 20-23.

     

    This problem is fixed beginning with version 19.4 of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 2 products

    Intel® Stratix® 10 MX FPGA
    Intel® Stratix® 10 TX FPGA