You will see JIC programming failure when current design is running in the FPGA is using OSC_CLK_1 as the configuration clock source AND reprogram the JIC file with a different Intel® Quartus® Prime Programmer version.
1) Load the JIC file using the same Intel® Quartus® Prime Programmer version. Then, configure the Factory Default Helper Image.
2) Erase the flash.
3) Power cycle the board.
4) Reprogram the JIC with a different Intel® Quartus® Prime Programmer version.
Example: with condition design running in the FPGA is using OSC_CLK_1
1) Failing case:
Load 18.0 JIC programmed using Intel® Quartus® Prime Programmer version 18.0 --> reprogram 18.0 JIC using Intel® Quartus® Prime Programmer version 18.1
2) Passing case:
Load 18.0 JIC programmed using Intel® Quartus® Prime Programmer version 18.0 --> reprogram Factory Default Helper Image using Intel® Quartus® Prime Programmer version 18.0 --> reprogram 18.0 JIC using Intel® Quartus® Prime Programmer version 18.0
OR
Load 18.0 JIC programmed using Intel® Quartus® Prime Programmer version 18.0 --> reprogram Factory Default Helper Image using Intel® Quartus® Prime Programmer version 18.0 --> Erase the flash --> Power Cycle --> reprogram JIC using Intel® Quartus® Prime Programmer version 18.1