Power Solutions - Support Center

Welcome to the Power Solutions support center!

Here you will find information to help you understand power consumption considerations when planning system designs, estimating power requirements throughout the entire design flow, and meeting demanding power requirements using Intel® Enpirion® Power Solution DC-DC converters. These converters feature integrated inductors to deliver an industry-leading combination of high efficiency, small footprint, and low-noise performance.

Enjoy your journey!

Get support resources for Intel® Agilex™, Intel® Stratix® 10, Intel® Arria® 10, and Intel® Cyclone® 10 devices from the pages below. For other devices, search from the following links—Documentation Archive, Training Courses, Videos, Design Examples, and Knowledge Base.

Getting Started

Power system design is done in several logical phases:

Choosing a Power Tree
In this phase, a power tree topology is chosen based on the requirements of the device. The requirements of the power supply may not yet be known, but the supply voltage and connection requirements of various devices are available in the Power Management Handbooks, Pin Connection Guidelines, and Power Tree selector guides in the Intel Enpirion Power Resource Center. Any required power supply sequencing and SmartVID usage will impact the power tree topology.

Power Estimation
In this phase, the amount of electrical power required by the various device power supplies is estimated using the Early Power Estimator (EPE) tool or Intel® FPGA Power and Thermal Calculator (PTC) and the Intel® Quartus® Prime Power Analyzer tool. As the design evolves to the final configuration, the quality and type of information available improve and the estimation becomes more accurate.

The current version of the Intel® FPGA PTC supports Intel Agilex and Intel Stratix 10 devices. This tool does not support older devices such as the Intel Arria 10 and Intel Cyclone 10 families; use the corresponding Early Power Estimator if you are working with those devices.

Power Optimization
In this phase, the device configuration can be optimized for minimum power. This step can involve the Intel® Quartus® software power optimization wizard, the SmartVID feature (in some devices), system cooling decisions, and/or dynamic workload management strategies. This phase may occur several times during the evolution of the system and device design.

Power Generation

In this phase, voltage regulator modules (VRMs) are selected based on the power tree and electrical power estimations. VRM selection is critical to producing high-quality power systems with the minimum number and cost of bypass elements. Intel Enpirion VRMs are featured due to their high quality and fast load transient response.

Power Distribution
In this phase, the power distribution network (PDN) is designed, producing a list of the required number, value, and quality of bypass capacitors using the PDN tool, power tree, VRMs, electrical power estimations, and board physical geometries.

Power Dissipation and Thermal Considerations
In this phase, thermal power estimations are used to select device cooling solutions. The EPE or PTC assists with the cooling of system designs. The effects of junction temperature on device power generation and device reliability should be considered in this phase.

1. Power Architecture – The Power Tree

Designing the Power Tree

2. Estimation and Optimization

Power Estimation

Power Optimization

Additional Resources

Intel Agilex Devices

Intel Stratix 10 Devices

Intel Arria 10 Devices

Intel Cyclone 10 LP Devices

3. Generation and Distribution



Additional Resources

4. Power Dissipation and Thermal Management


Intel Stratix 10 Devices

  • AN 787: Intel Stratix 10 Thermal Modeling and Management (HTML | PDF)

5. User Guides, Checklists, Design Examples, and Reference Designs

User Guides


Intel Agilex Devices

  • Intel Agilex Power Management User Guide (HTML | PDF)
  • Intel FPGA Power and Thermal Calculator User Guide (HTML | PDF)

Intel Stratix 10 Devices

  • Intel Stratix 10 Power Management User Guide (HTML | PDF)
  • Intel Stratix 10 Device Early Power Estimator User Guide (HTML | PDF)

Intel Arria 10 Devices

  • Intel Arria 10 Device Early Power Estimator User Guide (HTML | PDF)

Intel Cyclone 10 GX Devices

  • Intel Cyclone 10 GX Device Early Power Estimator User Guide (HTML | PDF)

Intel Cyclone 10 LP Devices

  • Intel Cyclone 10 LP Device Early Power Estimator User Guide (HTML | PDF)

Intel MAX 10 Devices

  • Intel MAX 10 Power Management User Guide (HTML | PDF)


Design Examples and Reference Designs

  • AN 742: PMBus SmartVID Controller Reference Designs (HTML | PDF)

6. Training Courses and Videos

Recommended Training Courses




Power Analysis


This is part one of a two-part training course. This training course will give you the knowledge and tools you need to perform highly accurate power usage estimations using the Intel Quartus Prime software. In this first part, you’ll learn how to perform an early power estimation before you've even started creating a design. You'll also learn how to set up and use the Power Analyzer to generate detailed reports on both static and dynamic power usage at any stage of the FPGA design flow.

Power Optimization


This is part two of a two-part training course. This training will give you the knowledge and tools you need to perform highly accurate power usage estimations using the Intel Quartus Prime software. In this second part, now that you know how to perform a power analysis, you’ll see how to use this information to optimize a design to minimize power through power-driven compilation options and following low-power design guidelines.

Thermal Management in Intel Stratix 10 Devices


Thermal management is an important aspect of implementing today's high-speed devices. The more power put into a device, the more heat that must be removed. Most FPGA devices consist of a single monolithic silicon die, making the process of designing a cooling solution focused on that single die. Intel Stratix 10 FPGA devices, however, consist of a core die and multiple transceiver dies, each of which affect the overall thermal profile of the entire device. In this training, you'll learn about the thermal factors involved with a multi-die device and how the new Intel Stratix 10 Early Power Estimator (EPE) makes it easy to calculate these factors based on your design and transceiver channel use. Use these calculated factors to make decisions about your FPGA design and cooling solution.

Recommended Videos



Power Supply Tolerance Terminology

This short video explains Intel®'s FPGA power supply deviation nomenclature and how to stay within the static and dynamic power accuracy budget.

Automated Early Power Estimator Parameter Generation Utilizing Intel Quartus Software

This short video introduces the Early Power Estimator (EPE) tool and how to easily export your design from the Intel Quartus software.

How to Generate the VCD File for Power Analyzer

There are several possible phases in modeling an FPGA power usage. This short video shows how to export the most complete and accurate power model from the Intel Quartus software into the EPE tool.

Meeting FPGA Power Requirements with Intel Enpirion Power Solutions

This short video shows how Intel Enpirion Power Solutions voltage regulator modules meet the power requirements of Intel® FPGAs.

Other Videos