H-Tile Hard IP Ethernet Intel® FPGA IP User Guide: Stratix® 10 Devices

ID 683430
Date 5/03/2024
Public
Document Table of Contents

B.5.3. Reserved

txsfc_name_0 Fields

Offset: 0x602

Bit Name Description Access Reset
31:0 id

Returns 0, override with soft logic to indicate specific core name

RO 0x0

Offset: 0x603

Bit Name Description Access Reset
31:0 id   RO 0x0

Offset: 0x604

Bit Name Description Access Reset
31:0 id   RO 0x0