Intel® MAX® 10 High-Speed LVDS I/O User Guide

ID 683760
Date 10/02/2023
Public
Document Table of Contents

1. Intel® MAX® 10 High-Speed LVDS I/O Overview

Updated for:
Intel® Quartus® Prime Design Suite 22.1
The Intel® MAX® 10 device family supports high-speed LVDS protocols through the LVDS I/O banks and the Soft LVDS Intel® FPGA IP.

The LVDS I/O banks in Intel® MAX® 10 devices feature true and emulated LVDS buffers:

  • True LVDS buffers support LVDS using true differential buffers.
  • Emulated LVDS buffers use a pair of single-ended pins to emulate differential buffers.
Table 1.  Summary of LVDS I/O Buffers Support in Intel® MAX® 10 I/O Banks
I/O Buffer Type VCCIO I/O Bank Support Device Support
True LVDS input 2.5 V All I/O banks All Intel® MAX® 10 devices.
1.8 V High-speed I/O banks except DDR3 I/O banks Industrial or commercial grade Intel® MAX® 10 D device variant, except in packages V36 and V81.
True LVDS output 2.5 V Bottom I/O banks All Intel® MAX® 10 devices.
1.8 V Bottom I/O banks Industrial or commercial grade Intel® MAX® 10 D device variant, except in packages V36 and V81.
Emulated LVDS output 2.5 V All I/O banks All Intel® MAX® 10 devices.

The Intel® MAX® 10 D (dual supply) and S (single supply) device variants support different LVDS I/O standards. For a list of LVDS I/O standards supported by the Intel® MAX® 10 D and S variants, refer to the related information.