Clock Control Intel® FPGA IP Core Release Notes

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ID 683802
Date 4/01/2024
Public
Document Table of Contents
Document Table of Contents x
1. Clock Control Intel FPGA IP Core Release Notes ( Stratix® 10 Devices) 2. Clock Control Intel FPGA IP Core Release Notes ( Agilex™ Devices)
1. Clock Control Intel FPGA IP Core Release Notes ( Stratix® 10 Devices) x
1.1. Clock Control Intel FPGA IP v20.0.0 1.2. Clock Control Intel FPGA IP v19.1.0 1.3. Clock Control Intel Stratix 10 FPGA IP v18.0 1.4. Stratix 10 Clock Control v17.1 1.5. Stratix® 10 Clocking and PLL User Guide Archives
2. Clock Control Intel FPGA IP Core Release Notes ( Agilex™ Devices) x
2.1. Clock Control Intel FPGA IP v2.0.1 2.2. Clock Control Intel FPGA IP v2.0.0 2.3. Clock Control Intel FPGA IP v1.0.0 2.4. Agilex™ 7 Clocking and PLL User Guide: F-Series and I-Series Archives
1. Clock Control Intel FPGA IP Core Release Notes ( Stratix® 10 Devices)
2. Clock Control Intel FPGA IP Core Release Notes ( Agilex™ Devices)

2.4. Agilex™ 7 Clocking and PLL User Guide: F-Series and I-Series Archives

For the latest and previous versions of this user guide, refer to Agilex™ 7 Clocking and PLL User Guide: F-Series and I-Series. If an IP or software version is not listed, the user guide for the previous IP or software version applies.

IP versions are the same as the Quartus® Prime Design Suite software versions up to v19.1. From Quartus® Prime Design Suite software version 19.2 or later, IP cores have a new IP versioning scheme.

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