AN 944: Thermal Modeling for Intel® Agilex™ FPGAs with the Intel® FPGA Power and Thermal Calculator

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ID 683810
Date 3/29/2021
Public
Document Table of Contents
Document Table of Contents x
1. List of Abbreviations 2. Introduction 3. Intel® Agilex™ FPGA Package Mechanical Design 4. Intel® Agilex™ FPGA Thermal Design Parameters 5. Thermal Design Process for Intel® Agilex™ Devices 6. Power and Thermal Calculator (PTC) for Intel® Agilex™ Devices 7. Example 2—Alternative Method of Analyzing Thermal Design 8. Document Revision History for AN 944: Thermal Modeling for Intel® Agilex™ FPGAs with the Intel® FPGA Power and Thermal Calculator
3. Intel® Agilex™ FPGA Package Mechanical Design x
3.1. Intel® Agilex™ Physical Package Structure
4. Intel® Agilex™ FPGA Thermal Design Parameters x
4.1. Intel® Agilex™ Compact Thermal Model (CTM) 4.2. Intel® Agilex™ Temperature Sensing 4.3. Thermal Sensor Accuracy
5. Thermal Design Process for Intel® Agilex™ Devices x
Thermal Design Stages 5.1. Thermal Parameter Dependencies and Accuracy
6. Power and Thermal Calculator (PTC) for Intel® Agilex™ Devices x
6.1. Device Selection and Analysis Example 6.2. Logic Design Information 6.3. Thermal Page and Thermal Design Parameters 6.4. CTM Model 6.5. Heat Sink 6.6. CFD Model
7. Example 2—Alternative Method of Analyzing Thermal Design x
7.1. Example 2—Full Length 1 Slot PCIe with 2 FPGAs 7.2. Thermal Design Optimization
1. List of Abbreviations
2. Introduction
3. Intel® Agilex™ FPGA Package Mechanical Design
4. Intel® Agilex™ FPGA Thermal Design Parameters
5. Thermal Design Process for Intel® Agilex™ Devices
6. Power and Thermal Calculator (PTC) for Intel® Agilex™ Devices
7. Example 2—Alternative Method of Analyzing Thermal Design
8. Document Revision History for AN 944: Thermal Modeling for Intel® Agilex™ FPGAs with the Intel® FPGA Power and Thermal Calculator

5. Thermal Design Process for Intel® Agilex™ Devices

This topic describes the stages of the Intel® Agilex™ FPGA thermal design process.
Figure 4.  Thermal Design Flow

Thermal Design Stages

  1. Supply design information to the Intel® FPGA Power and Thermal Calculator (PTC). This step provides the necessary data to estimate the power dissipation of each die. The inputs include the FPGA design information as well as the thermal design requirements of TA and TJ-MAX and power margin selection. At this point the design is still in its early stages; be aware that power predictions at this point may have inaccuracies and should not be taken as indicative of the final values for a functional design.
    Note: It is important to ensure that your design information is entered as accurately as possible, to ensure the most accurate thermal calculations.
  2. Obtain thermal design parameters from the PTC. The power dissipation of the transceiver die is provided as a constant value, but the main core die power dissipation is provided as a function of its junction temperature, and should be entered into the computational fluid dynamic (CFD) tool as a function of temperature for most accurate results.
  3. Obtain the compact thermal model (CTM). Contact your Intel Field Application Engineer (FAE) to obtain the applicable CTM for the CFD analysis.
  4. Run the CFD analysis. Model the system in the CFD tool and apply all the applicable power values to the corresponding dies. The CFD solution provides the TCASE. The CFD cannot predict the transceiver and HBM die temperatures, therefore those must be calculated manually.
  5. Compare the CFD results with the PTC results. If the CFD-predicted value for the TCASE is equal to or less than the TCASEcalculated by the PTC, then the cooling solution is sufficient. If the TCASE predicted by the CFD is higher than that calculated by the PTC, then additional cooling, or design changes such as transceiver placement optimization, may be needed. The PTC also allows for entering a cooling solution in the form of ΨCA , in which case it reports the resulting junction temperature; the PTC can also solve for needed ambient temperature to meet a required junction temperature.
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