Putting Altera MAX Series in Hibernation Mode Using User Flash Memory

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ID 683668
Date 1/14/2016
Public
Document Table of Contents
Document Table of Contents x
1. Putting Altera MAX Series in Hibernation Mode Using User Flash Memory
1. Putting Altera MAX Series in Hibernation Mode Using User Flash Memory x
1.1. Design Example Description 1.2. External Hardware Circuitry 1.3. Design in the MAX II Device 1.4. Design in the MAX 10 Device 1.5. Document Revision History
1.3. Design in the MAX II Device x
1.3.1. 4-Bit Binary Up-Counter 1.3.2. Data Controller 1.3.3. Timer 1.3.4. User Flash Memory Instantiation Module 1.3.5. User Flash Memory Data Save and Retrieval Method
1.4. Design in the MAX 10 Device x
1.4.1. 4-Bit Binary Up-Counter 1.4.2. 16-Bit Binary Slow Counter 1.4.3. Main Controller 1.4.4. Random Start Block
1. Putting Altera MAX Series in Hibernation Mode Using User Flash Memory

1.4.4. Random Start Block

At power-up, the random start block issues a POR cycle and then sends a fetch request signal to the main controller to read the UFM stored counter value at a static address and sends it to the 4-bit binary up-counter. When the Reset signal is asserted, it clears the system and reissues the fetch request to the main controller.

Level Two Title