Putting Altera MAX Series in Hibernation Mode Using User Flash Memory

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ID 683668
Date 1/14/2016
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Document Table of Contents
Document Table of Contents x
1. Putting Altera MAX Series in Hibernation Mode Using User Flash Memory
1. Putting Altera MAX Series in Hibernation Mode Using User Flash Memory x
1.1. Design Example Description 1.2. External Hardware Circuitry 1.3. Design in the MAX II Device 1.4. Design in the MAX 10 Device 1.5. Document Revision History
1.3. Design in the MAX II Device x
1.3.1. 4-Bit Binary Up-Counter 1.3.2. Data Controller 1.3.3. Timer 1.3.4. User Flash Memory Instantiation Module 1.3.5. User Flash Memory Data Save and Retrieval Method
1.4. Design in the MAX 10 Device x
1.4.1. 4-Bit Binary Up-Counter 1.4.2. 16-Bit Binary Slow Counter 1.4.3. Main Controller 1.4.4. Random Start Block
1. Putting Altera MAX Series in Hibernation Mode Using User Flash Memory

1.3.3. Timer

You can use the timer to determine the maximum idle time allowed before the supported Altera device is powered down. Timer is a counter in which the most significant bit (MSB) signal is used to trigger the process of saving the counter data into the UFM and powering down the supported Altera device.

Figure 3. Wait Timer EquationThe following equation shows how to calculate the wait time where T is wait time, n is the width of the counter, and f is the frequency of the internal oscillator that clocks the counter, typically 5 MHz. The width of the counter determines the wait time.

For a longer wait time, increase the counter's width. The signal from the pushbutton that increments the 4-bit binary up-counter resets the timer and prevents the supported Altera device from being powered down. For this example application, the width of the counter is 26 bits wide, so the wait time is approximately 7 seconds.

You can also implement the timer outside of the supported Altera device using other external components to reduce logic element (LE) usage.

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