Intel® Stratix® 10 GX FPGA Development Kit User Guide

ID 683674
Date 4/02/2020
Public
Document Table of Contents

6.3.11. Clock Controller

The Clock Controller application sets the Si5338 programmable oscillators to any frequency between 0.16 MHz and 710 MHz.

The Clock Controller application sets the Si5341 programmable oscillators to any frequency between 0.1 MHz and 712.5 MHz.

The Clock Control communicates with the MAX® V on the board through the JTAG bus. The programmable oscillator are connected to the MAX® V device through a 2-wire serial bus.

Figure 32. Clock Controller - Si5338
Figure 33. Clock Controller - Si5341

Si5338 tab and Si5341 tab display the same GUI controls for each clock generators. Each tab allows for separate control. The Si5338 is capable of synthesizing four independent user-programmable clock frequencies up to 710 MHz.

The controls of the clock controller are described below:

F_vco

Displays the generating signal value of the voltage-controlled oscillator.

Registers

Display the current frequencies for each oscillator.

Frequency

Allows you to specify the frequency of the clock MHz.

SSC

Set enable or disable Spread Spectrum Clocking.

Read

Reads the current frequency setting for the oscillator associated with the active tab.

Default

Sets the frequency for the oscillator associated with the active tab back to its default value. This can also be accomplished by power cycling the board.

Set Freq

Sets the programmable oscillator frequency for the selected clock to the value in the CLK0 to CLK3 controls for the Si5338. Frequency changes might take several milliseconds to take effect. You might see glitches on the clock during this time. Intel® recommends resetting the FPGA logic after changing frequencies.

Import

Import register map file generated from Silicon Laboratories ClockBuilder Desktop.