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1.1. Logic Array Block
1.2. Embedded Memory
1.3. Embedded Multiplier
1.4. Clocking and PLL
1.5. General Purpose I/O
1.6. High-Speed LVDS I/O
1.7. External Memory Interface
1.8. Analog to Digital Converter
1.9. Configuration Schemes
1.10. User Flash Memory
1.11. Power Management
1.12. Document Revision History for Intel® MAX® 10 FPGA Device Architecture
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1.7.1. Intel® MAX® 10 I/O Banks for External Memory Interface
In Intel® MAX® 10 devices, external memory interfaces are supported only on the I/O banks on the right side of the device. You must place all external memory I/O pins on the I/O banks on the right side of the device.
Figure 25. I/O Banks for External Memory Interfaces This figure represents the top view of the silicon die that corresponds to a reverse view of the device package.
External memory interfaces support is available only for dual supply (DC, DF, and DA) variant on 10M16, 10M25, 10M40, and 10M50 devices.