MAX® 10 FPGA Design Guidelines

ID 683196
Date 5/15/2024
Public
Document Table of Contents

1.8.1.4. Consider using incremental compilation

Use the incremental compilation feature to preserve logic in unchanged parts of your design, preserve timing performance, and reach timing closure more efficiently. You can speed up design iteration time by an average of 60% when making changes to the design with the incremental compilation feature.