Arria V Hard Processor System Technical Reference Manual

ID 683011
Date 12/02/2022
Public
Document Table of Contents

6. System Manager

The system manager in the hard processor system (HPS) contains memory-mapped control and status registers (CSRs) and logic to control system level functions as well as other modules in the HPS.

The system manager connects to the following modules in the HPS:

  • Direct memory access (DMA) controller
  • Ethernet media access controllers (EMAC0 and EMAC1)
  • Microprocessor unit (MPU) subsystem
  • NAND flash controller
  • Secure Digital/MultiMediaCard (SD/MMC) controller
  • Quad serial peripheral interface (SPI) flash controller
  • USB 2.0 On-The-Go (OTG) controllers (USB0 and USB1)
  • Watchdog timers