H-Tile Hard IP Ethernet Intel® FPGA IP User Guide: Stratix® 10 Devices

ID 683430
Date 4/09/2024
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

B.1.7. Auto-Negotiation Config Register 4

Provides the upper bits of the User Controlled Auto-negotiation Base Page

Offset: 0xC4

Access: RW

Auto Negotiation Config Register 4 Fields

Bit Name Description Access Reset
31:0 user_base_page_high User Controlled AN Base page (upper bits)

[29:5]: Technology Ability bits

[4:0]: TX Nonce bits

RW 0x0