H-Tile Hard IP Ethernet Intel® FPGA IP User Guide: Stratix® 10 Devices

ID 683430
Date 4/09/2024
Public

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Document Table of Contents

B.2.1. PHY Module Revision ID

Returns a 4 byte value indicating the revision of this design.

Offset: 0x300

Access: RO

PHY Module Revision ID Fields

Bit Name Description Access Reset
31:0 id Revision ID

32b Revision ID for the module.

RO 0x11112015