H-Tile Hard IP Ethernet Intel® FPGA IP User Guide: Stratix® 10 Devices

ID 683430
Date 4/09/2024
Public

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B.6.71. TX Frame bytes with no errors (upper 32 bits)

TX Frame bytes with no errors
Records the number of TX frame bytes from frames with no FCS, undersized, oversized, or payload length errors.
  • Frame bytes are all the bytes from an Ethernet packet, except for the preamble bytes
  • Bytes from packets that are less than 72 bytes long are not counted (undersize)
  • When length checking is turned on, bytes from frames where the L/T field was a Length, and the length was greater than the number of bytes in the packet are not counted (length error)
  • Bytes from packets that are longer than Maximum TX Frame Size value are not counted (oversize)
  • Bytes from packets that were interrupted by any kind of control frame are not counted (error or malformed)
  • Bytes from packets with an FCS error are not counted (error)
  • Bytes from packets with an L/T field that is between 1501 and 1535 inclusive are not counted (illegal type/length field)
  • The total count is 64b, split into a lower and upper 32b chunk
  • Because the count can change while the register is being read, Intel recommends using snapshot or shadow to freeze the count before reading it.

Offset: 0x863

Access: RO

TX Frame bytes with no errors (upper 32 bits) Fields

Bit Name Description Access Reset
31:0 stats_pcnt16 Statistics word

4 bytes of an 8 byte EHIP Statistics

RO 0x0